The SECURE-V project aims to propose an innovative open-source, secure and high-performance processor core based on the RISC-V ISA. The originality of the approach lies in the integration of a dynamic code transformation unit covering 4 of the 5 NIST functions of cyber-security, notably via monitoring (identify, detect), obfuscation (protect), and dynamic adaptation (react).

This dynamic management paves the way for online optimizations that improve the security and safety of the microarchitecture without redesigning either the software or the chip architecture.